The PDP-2 processor

Bus and State machine

   PDP-2 CPU Bus and State machine discription


   The register state for the PDP-2 is:

   AC<0:23>  accumulator
   MQ<0:23>  IO register
   OV        overflow flag
   PC<0:15>  program counter
   PF<1:6>   program flags
   SW<0:23>  switch register

   A-BUS
   A-ADR = <0:15>
   A-SRC = <idle,PC,IR>	selecting PC or IR implies dest. of MAR

   M-BUS
   M-DAT = <0:23> (inverted logic levels)
   M-SRC = <idle,MDR,MDR-EXT,PC,AC,MQ,SW>
   M-DES = <idle,MDR,IR,PC,AC,MQ>


   Major state machine
/*
   AC-OPS = ADD, SUB, MUS, DIS, AND, IOR, XOR, LAC, LIO, IDX, ISP
   DEPOSIT-OPS = DAC, DIO, DAP, DIP, DZM, JSP
   INX-OPS = IDX, ISP
   MEM-OPS = AC-OPS | DEPOSIT-OPS



The folling order codes acept either Memory referance or Immediate data

 <0:5>	M-DES  mnemonic  action

   02    AC     AND       AC = AC & ARG[]
   04    AC     IOR       AC = AC | ARG[]
   06    AC     XOR       AC = AC ^ ARG[]
   20    AC     LAC       AC = ARG[]
   22    MQ     LMQ       MQ = ARG[]
   40    AC     ADD       AC = AC + ARG[]
   42    AC     SUB       AC = AC - ARG[]
   50    AC     SAD       skip if AC != ARG[]
   52    AC     SAS       skip if AC == ARG[]
   54    AC     MUS       Multiply Step ARG[]
   56    AC     DIS       Divide Step ARG[]