The PDP-2 Input/Output Register

Bus and State machine

   PDP-2 CPU Input/Output Register discription


   The register state for the PDP-2 is:

   AC<0:23>  accumulator
   IO<0:23>  IO register
   OV        overflow flag
   PC<0:15>  program counter
?? PF<1:6>   program flags
   SW<0:23>  switch register

   A-BUS
   A-ADR = <0:15>
   A-SRC = <idle,PC,IR>	selecting PC or IR implies dest. of MAR

   M-BUS
   M-DAT = <0:23>
   M-SRC = <idle,MDR,MDR-EXT,PC,AC,IO,SW>
   M-DES = <idle,MDR,IR,PC,AC,IO>